Within the scope of this project, a hardware/software framework is to be created with which applications from the field of image processing can be easily and quickly created, evaluated and mapped onto the massively parallel processing platform developed in this project.
For this purpose, a toolchain will be developed that can be used to easily create, test and evaluate various tasks from the field of image processing. The complexity of these tasks ranges from simple filtering to far-reaching object recognition using artificial neural networks as well as their training. Different processing chains should be able to be assembled from simpler modules according to the modular principle. These modules will then be mapped onto a highly optimized embedded processor platform via a conversion tool - transparently for the application creator. The platform implements a scalable, massively parallel architecture with numerous compute cores developed at EIS, which is optimized for use on the Dream Chip Technologies (DCT) DCT10A system-on-module. This architecture is designed as a programmable array that can be connected as a co-processor with a controlling host processor. Through appropriate models, profiling information regarding processing power and required processing cores should be presented to the application programmer for evaluation even before the actual mapping.
Thus, the toolchain to be developed implements a mapping, evaluation and also modeling methodology to quickly and easily develop computer vision applications and port them to the Dream Chip DCT10A platform ("Computer-Vision to DCT10A"-Framework - CV2DCT10A-Framework).
Lead: Prof. Dr.-Ing. Guillermo Payá Vayá
Team: M.Sc. Sven Gesper
Running time: 2018-2021
Funding: Bundesministerium für Wirtschaft und Energie
