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EIS der TU Braunschweig
Chair for Chip Design for Embedded Computing
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Chair for Chip Design for Embedded Computing

The Chair for Chip Design for Embedded Computing (C3E) is led by Prof. Guillermo Payá Vayá. We are a part of the Institute of Theoretical Computer Science.
The mission of C3E is to contribute to the advancement of application-specific computing by proposing new methods and techniques to increase the efficiency of current processor architectures, for example, in terms of silicon area or power consumption.

The main research areas are:

  • Application-Specific Instruction-Set Processors, which includes high-performance processors, (ultra-)low-power processors, dynamically reconfigurable processors or fault-tolerant processors.
  • Memory Systems, including specialized direct memory controllers or processing-in-memory architectures.
  • Efficient hardware accelerators for FPGA and ASIC
  • Electronic System-Level design tools for application-Specific HW/SW systems
  • Software development tools (e.g. compiler backend, virtual prototyping, fast simulators)
  • Hardware verification methods

The cooperation with industrial partners is of key importance for the C3E. We can supply the state-of-the-art technology, innovation, and expert knowledge for industry unresolved problems. The C3E offers individual consultation/training as well as technology transfer in the abovementioned research areas.

Events

19.05.2026

Presentation MA Göger

11 AM

20.08.2026

Klausur HW-SW-Systeme

Zeit: 13:30 Uhr - 16 Uhr (Klausurbeginn 14 Uhr)
Ort: PK 4.122

10.09.2026

Klausur Softwaremodellierung elektronischer Systeme

Zeit: 08:30 Uhr - 11:00 Uhr (Klausurbeginn 9 Uhr)
Ort: PK 3.2

News

M.Sc. Eike Trumann auf der EuroSimE 2026

22.04.2026

Eike Trumann Presents his Current Research at EuroSimE 2026 in Warsaw

Eike Trumann presented his current research on radiation effects in SRAM-based FPGAs at EuroSimE 2026 in Warsaw. The work focused on Single Event…

V2PRO Onlineworkshop

02.02.2026

Hands-on Workshop about the V2PRO Vertical Vector Processor at C3E

On January 21, 2026, an online workshop on the scalable V²PRO vector processor architecture was held in collaboration with Prof. Ching-Hwa Cheng and…

Gia Bao Thieu at HiPEAC 2026

29.01.2026

Gia Bao Thieu presents the DCMA at HiPEAC 2026

At HiPEAC 2026, held from 26–28 January in Kraków, Gia Bao Thieu presented his 2025 journal paper on the Direct Cached Memory Access (DCMA).

The…

The C3E at the Tag der Informatik 2026

28.01.2026

The C3E at "Tag der Informatik" 2026

On Monday, January 26, EIS presented a compact exhibition featuring demonstrations of its research projects as part of the Day of Computer Science.…

M.Sc. Gia Bao Thieu at the CCMCC Conference 2025

10.10.2025

Gia Bao Thieu presents his Research at the IEEE CCMCC 2025 in Dresden

From October 8 to 10, 2025, the IEEE Cross-disciplinary Conference on Memory-Centric Computing (CCMCC 2025) took place in Dresden.

At the conference,…

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