Nitride Technology Center

Within the last 30 years, the group III nitride semiconductors (Ga_xAl_yIn_1-x-yN) revolutionised the optoelectronics. Based on the p-doping, which was shown 1989, the first efficient blue light emitting diode (LED) was presented in 1992 and the blue laser diode followed in 1997. These developments were honoured with the Nobel Prize in Physics in 2014. The lighting technology, the main area of application, will have an estimated market volume of 64 billion US$ in the year 2020.

The development of group III nitrides was possible only due to the technology of metalorganic vapour phase epitaxy (MOVPE). This growth method is used for almost all commercial group III nitride devices today.

In MOVPE hydrides (e.g. ammonia) and metal organic precursors (e.g. trimethylgallium) are transported into a reactor, partly by means of a carrier gas. In the reactor the susceptor, which is carrying the monocrystalline substrates (wafers), is heated to temperatures of around 1100 °C. Under these high temperatures the molecules of the precursors are party cracking. Ga and N are forming crystalline GaN on the wafer surface while the residual molecules and the carrier gas are pumped out of the reactor and filtered in a scrubber. For a successful MOVPE process it is very crucial to work under highest purity (no impurities from precursors or reactor leakages) and to have a precise control over the process parameters (like e.g. temperature, pressure and gas flows) and thereby over the properties of the growing semiconductor layers.

Two MOVPE setups for group III nitrides are in use at the Institute of Semiconductor Technology. GaN, InGaN and AlGaN layers can be grown as crystalline layers with controlled thicknesses and doping concentrations. Based on this expertise, application-specific layer stacks are designed and manufactured. In a next step these crystalline layers are characterised (e.g. by XRD, SEM, AFM, CL, PL or TEM, see Nano Analytic) and processed (see Processing/Deep Etching) depending on the specific application.

Besides the growth of planar layer stacks we are also developing the epitaxy of three-dimensional architectures. These are manufactured by selective area epitaxy: A template (e.g. a wafer with a GaN buffer layer) is party covered by a structured SiO_x mask. Under special epitaxy conditions, walls of GaN (so-called fins) can be grown in line-shaped openings of the mask. These fins feature non-polar sidewalls with low defect densities which could enhance the efficiency of LEDs drastically. We are investigating Fin LEDs for the visible (InGaN/GaN) as well as for the ultraviolet (AlGaN/GaN) spectral range.

Contact: Jana Hartmann

The market volume of gallium nitride (GaN) based semiconductor technologies is estimated to 64 billion US$ for 2020 and is mainly enabled by use of the metalorganic vapour phase epitaxy (MOVPE). On the other hand, the physical vapor phase deposition technique of sputtering is widely used for functional surfaces, insulating layers, thermal insulation layers, solar cells and transparent conductive coatings. Sputtering is a well scalable, safe and cheap technology if compared to MOVPE. Thus, one came up with the idea to investigate the capability of reactive sputtering regarding the deposition of crystalline group III nitride layers.

Within the scope of the BMBF project PlanB, the Institute of Semiconductor Technology investigated the reactive pulsed-DC sputtering of GaN, InGaN and AlGaN. Epitaxial layers with different indium and aluminum concentrations were deposited. Also, quantum structures and the incorporation of dopants like silicon and magnesium were shown.

Since early 2019, the work concentrates on the ultraviolet (UV) spectral range. As the difference in lattice constants between AlGaN and sapphire is higher than for GaN and sapphire, deep UV LEDs are commonly grown on AlN templates. A promising technology for generating these templates is sputtering of AlN on sapphire or silicon carbide with subsequent high temperature annealing at around 1700°C [1]. As a result, the multi-crystalline AlN layer reorganizes itself and shows a threading dislocation density in the 5∙10⁸ cm^-2 range, which is a good value for AlN. At such low dislocation densities, the internal quantum efficiency may reach values of around 80% [1].

^{[1] M. Kneissl (2016) A Brief Review of III-Nitride UV Emitter Technologies and Their Applications, published in M. Kneissl, J. Rass: III-Nitride Ultraviolet Emitters Technology and Applications}

Contact: Lukas Peters

In addition to the epitaxy setups, the complete process chain for fabricating semiconductor devices is available inside the Institute’s cleanroom laboratory. For patterning we have several lithography methods at hand, mostly used are photolithography and nanoimprint lithography. GaN can be etched by wet chemistry or by dry etching in an RIE-ICP (Reactive Ion Etching by Inductively Coupled Plasma). Both methods are used for the deep etching of 3-dimensional GaN architectures (see “Deep Etching”). We can use Rapid Thermal Annealing (RTA) for p-GaN activation or contact annealing. By an e-beam evaporation system we can deposit metal contacts (e.g. Ti or Au) or insulating layers (e.g. SiO_x). We have an Atomic Layer Deposition (ALD) for coating samples with very thin and highly conformal layers of SiO₂, ZnO or Al₂O₃. By a wafer saw we can separate single chips from the processed wafers. The Laser-Lift-Off (LLO) setup opens up further possibilities for GaN and sapphire processing.

Laser machining of nitride semiconductors and sapphire substrates

Modern laser technology provides high-power beams at high beam quality which can be utilized for efficient and accurate material processing. In our LENA optics lab an industrial-grade pulsed solid state laser is available. It provides pulse widths between 300 fs and 10 ps at a repetition rate of 200 kHz and a fundamental wavelength of 1040 nm. The ultra-short pulses limit the energy transfer to the crystal lattice during laser processing. That means that the heat-affected zone turns out to be small in comparison to the nanosecond and cw regime. By frequency conversion, shorter wavelengths of 520 and 348 nm can also be generated for different material processing steps.

The laser beam can be focussed onto the sample surface by different objectives. Scanning along the surface can either be realized by a galvanometer scanner, which rapidly deflects the beam by tiltable mirrors, or by moving the sample on a xy-positioner. Equipped with a powerful software, fully automated recipe sequences can be run.

Currently, two main research aspects are explored. On the one hand, the system is used for a LLO process of GaN-based LEDs from sapphire. Sapphire has been established as a reliable and cheap substrate for epitaxial growth of functional GaN layers. However, for certain applications as high-power or structured LEDs, other substrates, e.g., metals or non-transparent semiconductors, are more favourable. By directing strong laser pulses to the backside of the sapphire, the LED film can be separated from the carrier by local evaporation of an intermediate layer between device and substrate. We have recently demonstrated that this process, which is usually conducted with nanosecond pulsed excimer lasers, can be realized with ultrashort pulses at 520 nm.

On the other hand, the system is used for direct structuring of sapphire substrates. µLEDs produced at the Institute are commonly designed as bottom-emitters, i. e. the main direction of light emission is through the underlying sapphire substrate. For efficient use, e. g. coupling into a fibre, it may be beneficial to reduce the sapphire thickness. For this purpose laser-based pre-structuring of the sapphire wafers with high precision from the backside is applied before the epitaxial GaN growth of the device layers. Moreover, the setup can be used for chip separation as the last step in the production chain.

Contact: Jana Hartmann

Three-dimensional (3D) architectures like nano/microwires or fins can provide several advantages compared to planar structures: They have a large surface-to-volume ratio, non-polar sidewalls and potentially small footprints which could lead to crystal lattice relaxation. In the Institute 3D architectures are used for optoelectronic (e.g. flexible LEDs), electronic (Field Effect Transistors, FETs) and sensing applications. The structures are produced either by bottom-up (epitaxial growth, see selective area growth in “Epitaxy”) or top-down (i.e. etching) methods. The latter is described in the schematic below. By lithography a chromium layer is structured and used as a hard mask for the ICP-RIE. After the plasma process, the surfaces are very rough making a second step inevitable, which is wet etching in a KOH based solution. This smoothens the surfaces and leads to vertical sidewalls. By this deep etching method, the shape and size of the 3D architectures can be freely selected. Another advantage of the top-down approach is that vertical profiles along the height of the architectures (e.g. axial pn-junctions) are easily feasible: The layer stacks with different material compositions or doping concentrations can be designed based on the desired application and are subsequently grown as planar layers in MOVPE. Due to the planar growth there are no additional limitations (e.g. concerning the material composition) which would definitely emerge during selective 3D growth. After the planar epitaxy the structuring into the favoured shape is realized by deep etching.

Contact:  Jana Hartmann

Gallium Nitride-based (GaN) LEDs have established themselves over the last three decades as the dominant light source for the automotive sector up to general lighting. LED chips have become increasingly efficient and at the same time larger and larger. Today, internal quantum efficiencies of over 90%, close to the theoretical limit, are achieved. Nowadays 300 lumen/watt of white light can be emitted from these LEDs. GaN LEDs will therefore completely substitute all other light sources in the near future.

In contrast to large-area high-performance LEDs, microLEDs (µLEDs) with dimensions of 1 to 50 µm are becoming increasingly interesting, mainly driven by developments in display technology. Beyond this application purpose, many other applications can be derived.

At the Institute of Semiconductor Technology these µLED arrays are developed, fabricated and characterized. The LED arrays are basically chips containing a large number of µLEDs in specific arrangements and including their contact structures. Such a µLED array with 5 µm pixel size is shown in the figure (left). The corresponding chips are connected to in-house developed electronics to create complete integrated systems, such a PCB is shown in the figure (right). The µLED arrays are then controlled via a graphical user interface to create arbitrary light patterns and animations.

The fields of application for this µLED platform at the Institute of Semiconductor Technology are chip-based superresolution microscopy (Chipscope), resolution enhancement of holographic microscopy, optical manipulation of single atoms (EXC QF) and energy-efficient gas and fiber sensors.

Contact: Jan Gülink

Electrical energy represents a fundamental part of our society today and it is impossible to imagine our everyday life without it. Especially in the course of the conversion to renewable energies, the development of powerful and efficient electrical converters plays an important role. Here, wide-bandgap semiconductor materials such as gallium nitride (GaN) or silicon carbide (SiC) are a key factor for achieving high breakdown voltages and conversion efficiencies.

The excellent material properties of GaN, which is mainly known from its broad application in LEDs, led to the first commercialization of GaN transistors about ten years ago. The concept of these so-called High Electron Mobility Transistors (HEMTs) is based on the superior conductivity of a two-dimensional electron gas, which is automatically formed at the interface between GaN and AlGaN due to internal polarization fields, resulting in excellent transport properties and extremely fast switching times. However, the planar shape of HEMTs and the native normally-on character of the electron gas imposes certain limitations for applications in power electronics, especially in the high voltage range.

At the Institute of Semiconductor Technology, we investigate a novel vertical transistor concept based on regularly arranged GaN nano- and microstructures, which combines numerous potential advantages. The GaN structures are fabricated by deep etching of planar GaN wafers which were grown via metalorganic vapor phase epitaxy (MOVPE). The GaN structures are uniformly coated with a dielectric oxide layer and a wrap-around gate electrode. When a positive voltage is applied to the gate, it opens up a vertical channel close to the surface of the sidewalls by field effect and thus controls the current flow between the top and bottom of the structures. The three-dimensionality of the structures results in an excellent electrostatic control of the channel through the gate. Furthermore, GaN nanostructures allow partial strain relaxation and offer large non-polar surfaces on their sidewalls, which are suitable for the realization of normally-off transistors preferred for safe power switching. At the same time, the vertical architecture is advantageous for high breakdown voltages on a reduced chip area and allows arbitrary scaling of the current flow by parallel integration of many nanostructures in one device.

Several vertical transistors based on GaN nanowires as well as on mechanically more robust GaN fin structures were realized and demonstrate the functionality of the concept. The project is supported by device simulations by the Computational Electronics and Photonics (CEP) group from Bernd Witzigmann at Kassel University.  

Contact: Jana Hartmann