The EIS currently offers various, interesting topics for bachelor and master theses.
The EIS is doing research on a massively parallel vector processor architecture. For example, a TTA processor (Transport Triggered Architecture) is to be implemented as a controller for the vector processor in this context. In addition, a verification framework for testing the vector processor will be developed. The research of different strategies to implement CNN (Convolutional Neural Network) architectures is also exciting.
Another research area is low-power processors. The EIS is involved in the development of the hearing aid processor KAVUAKA and is currently researching compilers for KAVUAKA. Various work is also being contracted out in this area. E.g. the LLVM compiler shall be further developed and optimized or a new Clang compiler shall be implemented.
Furthermore the EIS is looking for a HiWi for an irradiation project. In this project the irradiation of a FPGA board by neutrons shall be investigated. The tasks would be the implementation of simple evaluation algorithms and of an interface between FPGA and host computer.
We are also looking for a HiWi in the area of teaching to support the EIS staff in extending existing lab content and creating new content.