This laboratory will be held in English.
This laboratory is intended for master's students.
Successfully completed participation of the module "VLSI Design" is mandatory. In addition, the module "Application-Specific Instruction-Set Processors" (ASIP) is recommended.
The laboratory takes place weekly on Fridays, 09:45 to 13:00, Raum IZ 262A, Abt. Entwurf Integr. Systeme, Gebaeude Mühlenpfordtstraße 23 (4103).
The VLSI-Lab is a practical laboratory for the design of integrated digital circuits (ASICs), also known as chip design. In this laboratory, students design digital circuits in the form of a microcontroller with peripheral modules. Furthermore, all design phases of the chip layout process are carried out, so that the developed circuits could theoretically be manufactured as a micro chip. During the different phases of the lab, the students design, specify, implement and verify digital circuits with hardware description languages, industrial EDA tools, FPGA-based rapid prototyping, and hardware test setups. In this year, the target application is a chip design for bitcoin mining. The students will have the possibility to consider different design targets, e.g., maximum performance or minimum required power consumption. For the chip design, standard cell libraries for a 65 nanometer semiconductor technology will be used. The qualification goals taught in this laboratory are successful project work in the field of digital circuit design from the specification to the in-circuit test of the designed circuit. The students gain knowledge about project planning, development work and teamwork. At the same time, students acquire specialized knowledge in their own work with used tools and hardware description languages. The goal is the successful and self-developed completion of the project and the exchange of the knowledge gained in teamwork.
The Chip Design Laboratory is divided into three successive phases. All phases of the laboratory consist of interactive self-study and seminars. The latter provide students with the knowledge necessary to work on the tasks in small groups in self-study. During the independently organized work in the groups on a defined task (self-study), a research associate of the institute checks the progress and gives assistance if necessary.
Phase 0: Chip conception and specification
The hardware modules to be implemented in phase 1 are designed and specified in small groups during this phase. This phase is based on the target application to be executed on the hardware. The application as well as the hardware modules in form of a microcontroller, peripheral modules and co-processors are selected and all necessary features of these are summarized and documented in this phase.
Phase 1: Module implementation and verification
At the beginning of phase 1, the students implement individual hardware modules specified in phase 0, i.e., a microcontroller, peripheral modules and co-processors, in small groups using VHDL. The knowledge from previous courses, which is required for VHDL design and testbenches (with System-C), is refreshed and extended in two seminars.
Phase 2: Chip design and prototyping
After the module development, different groups perform:
functional verification and emulation using a FPGA evaluation board (in-circuit emulation),
performing a complete ASIC synthesis and back-end flow based on a library of standard cells, and
porting a small application onto the system...
Rabaey, J. M., Chandrakasan, A. P., & Nikolić, B. (2003). Digital integrated circuits: a design perspective (Vol. 7). Upper Saddle River, NJ: Pearson Education.
Weste, N. H., & Harris, D. (2015). CMOS VLSI design: a circuits and systems perspective. Pearson Education India.
Brunvand, E. (2010). Digital VLSI chip design with Cadence and Synopsys CAD tools. Addison-Wesley.
Ashenden, P. J. (2010). The designer's guide to VHDL. Morgan Kaufmann.
Ashenden, P. (2008). Digital Design: An Embedded Systems Approach Using VHDL. Morgan Kaufmann.