Lab:non-volatile-FPGA-Tech-Eng

Advanced Non-Volatile FPGA Technology (ET-IDA-142)

(offered only in English in SS and WS)

Lecture time:  To be agreed on with interested students

Registration:
If interested, please contact Mr. mouadh Ayache <m.ayache@tu-bs.de>, Phone: 0531 391 5288 for more information

SUMMARY:
This is an advanced introduction to using non-Volatile modern FPGA SoC Technology. Number of places is limited to a maximum of 5 students.

Microsemi SmartFusion2 SoC FPGA Family technology is selected for this training laboratory. The selected chips include an embedded ARM Core Processor. This allows a single-chip system solution with powerful capabilities to be implemented. The technology is unique in its chip-wide distributed flash-based programmable logical cells.

Targets and Contents

TARGETS: The participant is expected to gain expertise summarized with at least the following learning targets:

CONTENTS:

  • basic experience in project initialization and using the dedicated development system for that technology: " Libero SoC Design Software " for Microsemi FPGAs.
  • Programming and debugging software using the embedded "ARM Cortex-M3 Processor with embedded flash memory"
  • Programming and design procedure of hardware structures using "SmartFusion 2 FPGA-Cell-Fabrik" and linking the structures to the software in the embedded ARM-Core as a complete system solution.
  • Using the special Hardware Security Infrastructure in the SmartFusion2 SoC chips.
  • Implementing a fully functional small sample project using possibly many of the SoC FPGA resources and a variety of its I/O interfaces.

 

Used Kits:

  • SmartFusion2 KickStart Development Kit: AES-SF2-KSB-G
  • SmartFusion2 Maker Board: M2S010-MKR-KIT
  • Future Creative Development Board: FUTUREM2SF-EVB
  • SmartFusion2 Security Evaluation kit: M2S090TS-EVAL-KIT

Special considerations:

  • Each student is expected to bring own laptop with adequate capabilities for Libero development system
  • The number of participants is initially limited to 5 persons.

Instruction language: English

Prerequisites: Basic knowledge of VHDL and C programming languages

Responsible staff: Prof. Wael Adi

Timing: Lab, lecture and exam times would be agreed on with the interested students. A workload and attendance of about 50 hours is expected.